Technical Field
Embodiments described herein relate to computing systems, and more particularly, to techniques adjusting performance settings for functional units within the computing system.
Description of the Related Art
Computing systems may include one or more systems-on-a-chip (SoC), which may integrate a number of different functions, such as, e.g., graphics processing, onto a single integrated circuit. With numerous functions included in a single integrated circuit, chip count may be kept low in mobile computing systems, such as tablets, for example, which may result in reduced assembly costs, and a smaller form factor for such mobile computing systems.
Within an SoC, different regions or functional units may operate at different clock frequencies (functional blocks operating at different clock frequencies are commonly referred to as being in different “clock domains”). For example, functional units coupled to external interfaces may operate at a clock frequency commensurate with the needs of such external interfaces, while other functional units may be designed to function at a highest clock frequency possible for a given semiconductor manufacturing process. Other functional units may include logic circuits operating at different clock frequencies, while some functional units may also allow for varying clock frequencies over time dependent upon work load.
Additionally, within an SoC, different regions or functional units may employ different internal power supplies, each of which may be at a different voltage level. For example, certain analog and Input/Output (I/O) circuits may require voltage levels higher than other digital circuit units. The SoC may include circuits, such as voltage regulators, e.g., configured to generate the internal power supplies.
During operation, voltage levels of the internal power supplies may be adjusted dependent upon performance or power requirements. For example, during periods of reduced activity within the SoC, voltage levels of one or more of the internal power supplies may be reduced to inactive portions of the SoC to reduce leakage power consumption. Alternatively or additionally, frequencies of internal clock signals may also be adjusted.